Caltech Workshop on Verification and Validation (Sept 23&24, 2009)

Organized by Mani Chandy, Richard Murray, Paulo Tabuada, and Ufuk Topcu.

Findings of the workshop will be summarized in a report that will be available here following the workshop.

Description

Formal verification and validation (V&V) have been subject to research in controls, computer science, and networking but often in isolation from each other. With recent convergence of controls, computation, and communication, there is a need for unified theories and algorithms. Despite advances in V&V tools in respective areas, such unification is in its infancy. Moreover, rigorous V&V for systems of current interest is a complicated task due to common difficulties including the interaction the software and the physical world, untraditional information flow, modeling/environmental uncertainties, and unavoidable explosion of computational complexity of the currently available tools (in both domains).

We believe that the success of formal methods and V&V in the intersection of controls, computer science, and networking is stringent on the development truly hybrid methods that blend ideas from all these areas and possibly others. The main purpose of the proposed workshop is to bring experts from academia, industry, and governmental agencies together and promote exchange of ideas and establishment of interdisciplinary collaborations. We will emphasize the integration of the tools and ideas from these fields to lead to a unified toolset. Moreover, we are expecting to highlight current trends and future directions in V&V research as well as industrial needs and requirements for V&V through outlook sessions and talks by experts from the industry and government agencies.

Speakers and titles of their presentations
NOTE: The “pdf version” following a title links to the copies written to pdf from either ppt or pptx. They may not properly display certain figures, animations, and/or equations. In that case, please try to download and open the original copies in ppt or pptx (clicking directly on the title).

Slides presented by the panelists

The Caltech Verification and Validation Workshop, 2009 is sponsored by Caltech’s Center for the Mathematics of Information and the Air Force Office of Scientific Research (through the MURI “Specification, Design and Verification of Distributed Embedded Systems”).

Workshop web site

The workshop will be held in Annenberg Building room 105. The location of this building in Caltech campus is marked in the map.


Slides presented by Yaniv Saar on Sept 25 (at Caltech) “Solving reactive games - a case study for JTLV